ECE 5/418 PLL and Memory IC Design

Spring 2015, Boise State University

Previous year’s course page is here: s13 (with videos)   

Lecture notes are here and course handouts are here.

Homework assignments, project information, and due dates are located here.

Current grades are here.

Cadence Wiki with FAQs is here.

 

Instructor       : Vishal Saxena

Time               : Tuesday and Thursday, 4:30–5:45 PM

Course dates  : Jan 12 – May 11, 2014

Location         : MEC 301

Office Hours   : 3:00-4:00 PM or by appointment

Holidays         : March 26 and 28

Final Exam time: Thursday, May 7, 3:00-5:00 PM

Course TA     :  None. Submit HWs to the instructor (vishalsaxena AT boisestate DOT edu).

 

Textbook – No single textbook. Lecture notes and handouts will be used. Following references are useful:

·         RF Microelectronics, B. Razavi, 2nd Ed., Prentice Hall, 2012 (Chapters 9-11)

·         Design of Analog CMOS Integrated Circuits, B. Razavi, McGraw-Hill, 2002 (Chapters 14-15)

·         CMOS Circuit Design, Layout and Simulation – R. J. Baker, 3nd Edition, Wiley-IEEE, 2010 (Chapter 16)

            For detailed references and handouts see this page. 

Matlab/Simulink based PLL demos are available at the wiki.

 

Course content –Design and analysis of Phase-locked Loops (PLLs): loop-stability, VCOs, phase-noise analysis, integer and fractional architectures, injection locking;

Delay-locked Loops (DLLs) and Clock and Data Recovery (CDR) circuits;

Overview of Memory Architectures.  PREREQ: ECE 5/410.

 

Note: This course will emphasize on PLL design. It is recommended that the students have a good understanding of Analog Circuits (ECE 5/411).

 

For Graduate credit (ECE 518): A more complex design project will be assigned and additional homework and exam problems may be given.

 

CAD software information

The course will require extensive use of Cadence Design System in Linux environment. Set up your account to remotely use Cadence using the wiki.

 

The course Google group is (http://groups.google.com/group/ams-bsu) and the email address is ams-bsu@googlegroups.com  

 

Workload (Grading) 

25% Homeworks

25% Midterm

25% Project1

25% Project2

 

Policies

No late work accepted. All assigned work is due at the beginning of class.

Neither the final exam nor final project will be returned at the end of the semester.

Cheating or plagiarism of any form will result in an automatic F grade in the course (so do your own homework and projects!). Students should review Section 18/18A/18B of the Boise State University Student Code of Conduct (http://www.boisestate.edu/policy/policy_docs/2020_studentcodeofconduct.pdf) for more detailed information regarding academic dishonesty.

Return